SpaceWire CODEC (Link) Intellectual Property (VHDL)

The SpaceWire CODEC Intellectual Property forms an advanced and totally expandable SpaceWire CODEC (Link) Interface that conforms fully to the ECSS-E-50-12A specification. A block diagram and feature list for the SpaceWire CODEC are given below:-

Key Features:

Fully compliant with the ECSS-E-50-12A specification
Totally symmetrical Transmit & Receive interface
Uses Autonomous Cascadable DP FIFO handshake mechanism
Supports auto-swallow for outgoing disconnected packets
Supports EEP packet termination for incoming disconnected packets
Uses our own in-house TMR Storage Elements (FF's and RAM's)
Low latency serial to parallel and parallel to serial transfers
Designed using a low-level (hand crafted) design technique
Very small gate count (Xilinx FPGA)
Low power implementation
Written entirely in Synthesizable VHDL (RTL)
Comes with an advanced testbench and example stimuli
IP Package contains ModelSim & Xilinx simulation & build scripts

The SpaceWire CODEC is surrounded by a number of Interfaces (pins) that are described below:-

Interface	Description
General	The General Interface consists of two inputs, a 50MHz clock and a synchronous active high reset. The reset is used to reset and set every single flip-flop in the design and must be applied at power-on to bring the CODEC into a known state.
Link Enable	The Link Enable Interface consists of two active high inputs, Enable and Disable. When Enable is asserted the CODEC is allowed to move from the Ready state into the Started state. When Disable is asserted the CODEC, when in the Run state, will move immediately to the Error Reset state.
Active	The Active Interface consists of one active high output that is asserted when the CODEC is in the Run state.
Serial Receive	The Serial Receive Interface consists of two inputs that carry Data and Strobe SpaceWire data into the CODEC.
Serial Transmit	The Serial Transmit Interface consists of two outputs that carry Data and Strobe SpaceWire data out of the CODEC.
Output Time	The Output Time Interface forms an Autonomous Cascadable DP FIFO handshake mechanism that us used to transfer received Time-Code data out of the CODEC. This interface is unbuffered, hence it overwrites any old (untaken) Time-Code with the very latest received Time-Code.
Output Data	The Output Data Interface forms an Autonomous Cascadable DP FIFO handshake mechanism that is used to transfer received NChar data out of the CODEC. This interface is fully buffered and also flow controlled, hence no data loss should occur.
Input Time	The Input Time Interface forms an Autonomous Cascadable DP FIFO handshake mechanism that us used to transmit input Time-Code data out of the CODEC. This interface is unbuffered, hence it allows any old (untransmitted) Time-Code to be overwritten with the very latest input Time-Code.
Input Data	The Input Data Interface forms an Autonomous Cascadable DP FIFO handshake mechanism that is used to transmit input NChar data out of the CODEC. This interface is fully buffered and also flow controlled, hence no data loss should occur.

The SpaceWire CODEC IP can be used as a standalone module or connected to our SpaceWire Switch Core to form a complete SpaceWire Routing Switch (Router).

The SpaceWire CODEC architecture is based on three bed rock principles:-

Simplicity - Partition the design into simple functional units.

Consistency - Transfer Data, Time & Flow Control using the exact same mechanism.

Re-usability - Create design units that can be used with all new CODEC designs.

By bringing these three basic principles together a near perfect symmetrical architecture can be achieved:-

Interactive block diagram - click on area of interest to find out more.

Listed below are the module descriptions for all the blocks used in the SpaceWire CODEC design. Please note that these descriptions describe the module level operation which may vary in relation to the SpaceWire specification. It is only when all the modules are connected together that a fully compliant SpaceWire CODEC is formed.

The Receiver is used to lock onto the incoming serial stream, decode it and then output the decoded results in parallel form. The Receiver also deals with character and error detection and provides these as output signals.

	Key Features:
Locks onto full 10-bit Initial NULL character for additional safety Uses Autonomous Cascadable DP FIFO handshake mechanism Updates time with the very latest time-code for precise time distribution Characters only passed on after full parity validation Simple design unit that deals mainly with serial to parallel conversion

The Receiver has three output handshake interfaces:-

Time - Outputs the very latest Time-Code Character received by the Receiver, overwriting the old value if necessary.
Data - Outputs any Normal Characters (Data, EOP or EEP) received by the Receiver.
FCT - Outputs any Flow Control (FCT) Characters received by the Receiver.

The Receiver has five single pulse error outputs that are used by the State Machine:-

err_nchar - Pulses when too many NChar's arrive or a NChar arrives when it is not allowed.
err_esc - Pulses when a lone ESC character is received (ESC followed by ESC, EOP or EEP).
err_dsc - Pulses when there as been no incoming bit detected for 850ns.
err_fct - Pulses when too many FCT's arrive or a FCT arrives when it is not allowed.
err_par - Pulses when a parity error is detected in one of the received Characters.

The Receiver has four character detection outputs that are also used by the State Machine:-

got_null - Goes and stay high when the Initial NULL Character is received.
got_fct - Pulses when a FCT Character is received.
got_nchar - Pulses when a Normal Character (Data, EOP or EEP) is received.
got_time - Pulses when a Time-Code Character is received.

The Receiver is controlled by the main State Machine and operates as follows:-

State	Operation
Error Reset	- Data & Strobe serial inputs are ignored. - Output Time Interface transfers any outstanding Time-Code and is then held in reset (tim_empty = '1') preventing any Time-Code transfer. - Output FCT Interface is held in reset (fct_empty = '1') preventing any FCT transfer. - Output Data Interface is held in reset (dat_empty = '1') preventing any Normal Character transfer. - Output Error Interface is held in reset (outputs = '0'). - Output Character Interface is held in reset (outputs = '0').
Error Wait Ready Started Connecting Run	While the Initial NULL Character remains undetected the Receiver operates as follows:- - Data & Strobe serial inputs are checked for the presence of the Initial NULL Character. - Output Time Interface transfers any outstanding Time-Code and is then held in reset (tim_empty = '1') preventing any Time-Code transfer. - Output FCT Interface is held in reset (fct_empty = '1') preventing any FCT transfer. - Output Data Interface is held in reset (dat_empty = '1') preventing any Normal Character transfer. - Output Error Interface is held in reset (outputs = '0'), however err_dsc now pulses if a 850ns time-out is detected. - Output Character Interface is held in reset (outputs = '0'). Once the Initial NULL Character is detected got_null is asserted and the Receiver operates as follows:- - Data & Strobe serial inputs are checked for the presence of all Characters. - Output Time Interface operates as normal transferring the very latest received Time-Code. - Output FCT Interface operates as normal transferring any received FCT. - Output Data Interface operates as normal transferring any received Normal Character. - Output Error Interface operates as normal pulsing its error outputs when any errors are detected. - Output Character Interface operates as normal pulsing its character outputs when any characters are detected.

The Transmitter is used to convert parallel Time-Code, FCT & NChar data into a serial Data & Strobe output stream. The Transmitter also deals with the priority encoding of the three inputs.

	Key Features:
Prioritized inputs (Time, FCT & NChar) Uses Autonomous Cascadable DP FIFO handshake mechanism Simple design unit that deals only with parallel to serial conversion

The Transmitter has three input handshake interfaces that are prioritized in the following order:-

Time - Transmits the very latest Time-Code Character input to the Transmitter, discarding the old value if necessary.
FCT - Transmits any Flow Control (FCT) Characters input to the Transmitter.
Data - Transmits any Normal Characters (Data, EOP or EEP) input to the Transmitter.

If none of the above Characters are available then the following Character is used:-

NULL - Transmits a NULL Character if no other Characters are available.

The Transmitter is controlled by the main State Machine and operates as follows:-

State	Operation
Error Reset Error Wait Ready	- Data & Strobe serial outputs are held in reset (outputs = '0'). - Input Time Interface operates as normal but discards all Time-Codes. - Input FCT Interface is held in reset (fct_full = '1') preventing any FCT transfer. - Input Data Interface is held in reset (dat_full = '1') preventing any Normal Character transfer.
Started Connecting	- Data & Strobe serial outputs transmit Characters. - Input Time Interface operates as normal but discards all Time-Codes. - Input FCT Interface operates as normal transferring FCT's. - Input Data Interface operates as normal transferring Normal Characters.
Run	- Data & Strobe serial outputs transmit Characters. - Input Time Interface operates as normal transferring all Time-Codes. - Input FCT Interface operates as normal transferring FCT's. - Input Data Interface operates as normal transferring Normal Characters.

The State Machine handles the current operating mode of the CODEC that can be changed by Errors, Received Characters, Time-outs and User Requests.

	Key Features:
Accepts all error signals as separate inputs for logging and monitoring Design unit re-usable for all new CODEC designs

The State Machine operates as follows:-

Current State	Next State	State Change Triggers
Error Reset	Error Wait	6.4us elapsed
Error Wait	Error Reset	got_fct, got_nchar, got_time, err_par, err_esc, err_dsc
Error Wait	Ready	12.8us elapsed
Ready	Error Reset	got_fct, got_nchar, got_time, err_par, err_esc, err_dsc
Ready	Started	enable
Started	Error Reset	12.8us elapsed, got_nchar, got_time, err_par, err_esc, err_dsc
Started	Connecting	got_null
Connecting	Error Reset	12.8us elapsed, got_nchar, got_time, err_par, err_esc, err_dsc
Connecting	Run	got_fct
Run	Error Reset	err_fct, err_nchar, err_par, err_esc, err_dsc, disable

The Receive FIFO behaves just like a standard Autonomous Cascadable Dual Port FIFO but is protected by the addition of a flow control mechanism. What this means is that for every FCT output from the FIFO eight NChar's can be input to it. The FIFO allows upto seven FCT's to be outstanding at any one time and deals with all the complex issues of credit counting.

Key Features:

Variable FIFO with depths from 128 to 2048 bytes
Adds EEP packet terminator on incoming disconnected packets
Uses Autonomous Cascadable DP FIFO handshake mechanism
Encapsulates all complex flow-control logic into FIFO design
Can handle 500MBit/s Receivers as standard with a 50MHz crystal
Design unit re-usable for all new CODEC designs
Comes with its own advanced testbench and example stimuli

The Receive FIFO does not handshake NChar input data when there is no credit for it, which makes NChar overflow very easy to detect:-

When dat_full is high and dat_nwrite is low there is a NChar but no credit for it (the Receiver will pulse err_nchar in this case).

The Receive FIFO is controlled by the main State Machine and operates as follows:-

State	Operation
Error Reset Error Wait Ready Started	- Input Data Interface adds an EEP to any partially input packet and is then held in reset (dat_full = '1') preventing any Normal Character transfer. - Output FCT Interface is held in reset (fct_empty = '1') preventing any FCT transfer. - Output Data Interface operates as normal transferring Normal Characters.
Connecting	- Input Data Interface is held in reset (dat_full = '1') preventing any Normal Character transfer. - Output FCT Interface operates as normal allowing upto 7 FCT's to be outstanding. - Output Data Interface operates as normal transferring Normal Characters.
Run	- Input Data Interface operates as normal transferring Normal Characters. - Output FCT Interface operates as normal allowing upto 7 FCT's to be outstanding. - Output Data Interface operates as normal transferring Normal Characters.

The Transmit FIFO behaves just like a standard Autonomous Cascadable Dual Port FIFO but is protected by the addition of a flow control mechanism. What this means is that for every FCT input to the FIFO eight NChar's can be output from it. The FIFO allows upto seven FCT's to be outstanding at any one time and deals with all the complex issues of credit counting.

	Key Features:
Simple FIFO with a depth of 2 bytes Swallows all outgoing disconnected packets Uses Autonomous Cascadable DP FIFO handshake mechanism Encapsulates all complex flow-control logic into FIFO design Can handle 500MBit/s Transmitters as standard with a 50MHz crystal Design unit re-usable for all new CODEC designs Comes with its own advanced testbench and example stimuli

The Transmit FIFO does not handshake FCT input when there is no room for it, which makes FCT overflow very easy to detect:-

When fct_full is high and fct_nwrite is low there is a FCT but not enough room for it (the Receiver will pulse err_fct in this case).

The Transmit FIFO is controlled by the main State Machine and operates as follows:-

State	Operation
Error Reset Error Wait Ready Started	- Input Data Interface operates as normal but discards all incoming packets, including remainder of any partially output packet. - Input FCT Interface is held in reset (fct_full = '1') preventing any FCT transfer. - Output Data Interface is held in reset (dat_full = '1') preventing any Normal Character transfer.
Connecting	- Input Data Interface operates as normal but discards all incoming packets, including remainder of any partially output packet. - Input FCT Interface operates as normal allowing upto 7 FCT's to be outstanding. - Output Data Interface is held in reset (dat_full = '1') preventing any Normal Character transfer.
Run	- Input Data Interface operates as normal but discards remainder of any partially output packet. - Input FCT Interface operates as normal allowing upto 7 FCT's to be outstanding. - Output Data Interface operates as normal transferring Normal Characters.