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SpaceWire CODEC Transmit FIFO Testbench
The testbench for the SpaceWire CODEC Transmit FIFO is built up using the standard testbench modules,
PGive,
PTake and
PSnoop.
An illustration of how the testbench modules are connected together to form the Transmit FIFO Testbench is given below:-
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| Interactive block diagram - click on area of interest to find out more. |
The FIFO has three handshake interfaces that are all controlled via stimulus files input to the
PGive and
PTake testbench modules. By adjusting the content of these files an almost infinite amount of operating scenarios can be created. In addition to the stimulus files the testbench can also change the state input, thus allowing the FIFO's operation to be validated in every SpaceWire state.
Also provided within the testbench is a self-checking mechanism that checks the following points:-
- The Transmit FIFO only has 7 FCT's outstanding at any one time.
- The Transmit FIFO only outputs DATA that it has been given credit for.
- The Transmit FIFO only inputs FCT's in the Connecting & Run states.
- The Transmit FIFO only outputs DATA in the Run state.
- The Transmit FIFO does not block input DATA in a non-Run state.
There are 11 sets of tests used to validate the functionality of the SpaceWire CODEC Transmit FIFO, these are detailed below.
Test 1 (0us to 1us) - Error Reset state with empty FIFO
This test is used to check that during the Error Reset state the empty Transmit FIFO does absolutely nothing other that discard all the incoming data, i.e:-
- Data is input (swallowed) by the FIFO via the Input Data Interface.
- Data is not output by the FIFO via the Output Data Interface.
- FCT's are not input by the FIFO via the Input FCT Interface.
The test is set-up such that:-
- Data is provided to the FIFO at the maximum data rate.
- Data can be taken from the FIFO at the maximum data rate.
- FCT's are provided to the FIFO at the maximum data rate.
The Data In handshake signal should show frequent handshakes thoughout the test, but the Data Out and FCT In handshakes should remain negated.
Test 2 (1us to 2us) - Error Wait state with empty FIFO
This test is used to check exactly the same as Test 1 but for the Error Wait state.
Test 3 (2us to 3us) - Ready state with empty FIFO
This test is used to check exactly the same as Test 1 but for the Ready state.
Test 4 (3us to 4us) - Started state with empty FIFO
This test is used to check exactly the same as Test 1 but for the Started state.
Test 5 (4us to 5us) - Connecting state with empty FIFO
This test is used to check that during the Connecting state the empty Transmit FIFO does absolutely nothing other than input FCT's and discard all the incoming data, i.e:-
- Data is input (swallowed) by the FIFO via the Input Data Interface.
- Data is not output by the FIFO via the Output Data Interface.
- 7 FCT's are input by the FIFO via the Input FCT Interface.
The test is set-up such that:-
- Data is provided to the FIFO at the maximum data rate.
- Data can be taken from the FIFO at the maximum data rate.
- FCT's are provided to the FIFO at the maximum data rate.
The Data In handshake signal should show frequent handshakes throughout the test, but the Data Out handshake should remain negated. The FCT In handshake signal should show 7 handshakes taking place.
Test 6 (5us to 6us) - Run state with empty FIFO
This test is used to check that during the Run state the empty Transmit FIFO operates fully, i.e:-
- Data is input by the FIFO via the Input Data Interface.
- Data is output by the FIFO via the Output Data Interface.
- FCT's are input by the FIFO via the Input FCT Interface.
The test is set-up such that:-
- Data is provided to the FIFO at the maximum data rate.
- Data can be taken from the FIFO at the maximum data rate.
- FCT's are provided to the FIFO at the maximum data rate.
The three handshake signals should show frequent handshakes taking place throughout the test. The main point to check with this test is that for every FCT input to the FIFO eight NChar's are output from it.
Note initially how the Data Out handshake remains negated, this is because the FIFO is discarding the rest of a packet that it started discarding during the last state (test).
Test 7 (6us to 7us) - Run state with FIFO filling faster that it is emptying
This test is used to check that during the Run state the FIFO can handle being constantly full and nearly full, i.e:-
- Data is input by the FIFO via the Input Data Interface.
- Data is output by the FIFO via the Output Data Interface.
- FCT's are input by the FIFO via the Input FCT Interface.
The test is set-up such that:-
- Data is provided to the FIFO with a 0 to 2 cycle gap between transfers.
- Data can be taken from the FIFO but has a 2 to 4 cycle gap between transfers.
- FCT's are provided to the FIFO at the maximum data rate.
All three handshake signals should show frequent handshakes throughout the test, with the Data Out handshake pattern closely following the Data In handshake pattern.
Test 8 (7us to 8us) - Run state with FIFO emptying faster that it is filling
This test is used to check that during the Run state the FIFO can handle being constantly empty and nearly empty, i.e:-
- Data is input by the FIFO via the Input Data Interface.
- Data is output by the FIFO via the Output Data Interface.
- FCT's are input by the FIFO via the Input FCT Interface.
The test is set-up such that:-
- Data is provided to the FIFO with a 2 to 4 cycle gap between transfers.
- Data can be taken from the FIFO but has a 0 to 2 cycle gap between transfers.
- FCT's are provided the FIFO at the maximum data rate.
All three handshake signals should show frequent handshakes throughout the test, with the Data Out handshake pattern closely following the Data In handshake pattern.
Test 9 (8us to 9us) - Run state changing to Error Reset state
This test is used to check that during a state change from Run to Error Reset the FIFO correctly stops outputting data, i.e:-
- Data is input by the FIFO via the Input Data Interface.
- Data is output by the FIFO via the Output Data Interface, but is then not output during the Error Reset state.
- FCT's are input by the FIFO via the Input FCT Interface, but then are not input during Error Reset state.
The test is set-up such that:-
- Data is provided to the FIFO at the maximum data rate.
- Data can be taken from the FIFO at the maximum data rate.
- FCT's are provided to the FIFO at the maximum data rate.
All three handshake signals should show frequent handshakes until the state changes to Error Reset, after this only the Data In handshake should show transfers with the other two showing none.
Test 10 (9us to 10us) - Error Reset state changing to Run state
This test is used to check that during a state change from Error Reset to Run the FIFO correctly starts outputting new packets, i.e:-
- Data is input by the FIFO via the Input Data Interface.
- Data is not output by the FIFO via the Output Data Interface, but then is output during the Run state.
- FCT's are not input by the FIFO via the Input FCT Interface, but then are input during Run state.
The test is set-up such that:-
- Data is not provided to the FIFO at the maximum data rate.
- Data can be taken from the FIFO at the maximum data rate..
- FCT's are provided to the FIFO at the maximum data rate.
The Data Out and FCT In handshake signals should remain negated until the state changes to Run, after this they should show frequent handshakes. The Data In handshake signal should show frequent handshakes thoughout the test.
Test 12 (10us to 100ms) - Total Chaos!
This test is used to try and break the FIFO design by operating it in totally random states, with input Data that has random gaps between the transfers, output Data that has random gaps between the transfers and also FCT's that have random gaps between the transfers, i.e:-
- Data is input by the FIFO via the Input Data Interface.
- Data is output by the FIFO via the Output Data Interface.
- FCT's are input by the FIFO via the Input FCT Interface.
The test is set-up such that:-
- Data is provided to the FIFO with a 0 to 10 cycle gap between transfers.
- Data can be taken from the FIFO but has a 0 to 10 cycle gap between transfers.
- FCT's are provided to the FIFO but have a 0 to 7 cycle gap between transfers.
The three handshake signals should show frequent handshakes taking place throughout the test. The main thing to check with this test is that the Transmit FIFO swallows packets when in a non-Run state. This swallowing also extends into the Run state if a packet started to be swallowed in another state.
If any of the three handshake signals stop before the full 50,000 NChar's go into the FIFO (100ms second of simulation time) then the FIFO is behaving incorrectly. Likewise if the self-checking testbench reports an error to the simulator window then the FIFO is also behaving incorrectly.
Note that this test produces many illegal states and also state transitions that would never occur during normal CODEC operation.
