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Missing Image!
Part 8 - Resurrect, modify & build 3rd firmware project


This tutorial details the steps required for resurrecting & modifying an existing Vivado project to add interrupts to the GPIO module.


The aims of this tutorial are as follows :-
  1. Setup environment
  2. Copy repository
  3. Resurrect project
  4. Open block design
  5. Re-customize ZYNQ IP
  6. Re-customize AXI GPIO IP
  7. Manually wire up connection
  8. Rename external ports
  9. Validate block design
  10. Modify pin constraints
  11. Generate bitstream
  12. Export Hardware Platform
  13. Archive project
  14. Commit to repository

1. Setup environment

Setup Xilinx design environment for the 2021.2 toolset.
steve@Linux-Steve:/home/steve$ source
Xilinx tools available tools at /opt/Xilinx :-
1) 2021.2 - Vivado - SDK - Vitis - PetaLinux
0) Exit
Please select tools required or exit : 1

Tools are as follows :-
vivado @ /opt/Xilinx/Vivado/2021.2/bin/vivado
vitis @ /opt/Xilinx/Vitis/2021.2/bin/vitis
petalinux-build @ /opt/Xilinx/PetaLinux/2021.2/tool/tools/common/petalinux/bin/petalinux-build

2. Copy repository

This project is not strictly a branch of the previous project but by using that as a starting point negates the need to start over. Copy the leds_switches repository and checkout the files it contains.
steve@Linux-Steve:/home/steve$ svnadmin hotcopy /home/steve/repos/leds_switches /home/steve/repos/leds_buttons
steve@Linux-Steve:/home/steve$ cd /home/steve/projects
steve@Linux-Steve:/home/steve/projects$ svn checkout file:///home/steve/repos/leds_buttons

3. Resurrect project

Resurrect the previous project in Vivado by using the regeneration Tcl script.
steve@Linux-Steve:/home/steve/projects$ cd leds_buttons/fw
steve@Linux-Steve:/home/steve/projects/leds_buttons/fw$ vivado -nojournal -nolog -notrace -source project.tcl &

4. Open block design

Once Vivado appears and completes execution of the Tcl script open the block design by clicking on Open Block Design under the IP INTEGRATOR heading inside the Flow Navigator section. Expand the Diagram by clicking on the Float Missing Image! icon in the Diagram pane inside the BLOCK DESIGN section.

5. Re-customize ZYNQ IP

Double click on the ZYNQ7 Processing System module to begin re-customization.

An interrupt input is required for this design to allow triggered communication from the GPIO to the ZYNQ7 Processing System To enable the IRQ_F2P connection select Interrupts, expand Fabric Interrupts, expand PL-PS Interrupt Ports, tick Fabric Interrupts and then tick Fabric Interrupts. Missing Image! Click OK to commit the changes.

6. Re-customize AXI GPIO IP

Double click on the AXI GPIO module to begin re-customization.

Connections to both the LED's and Push Buttons on the ZedBoard are required for this design. Change the GPIO Width parameter in the GPIO2 section from 8 to 5. Connection to the interrupt output ip2intc_irpt on the AXI GPIO is also required. To enable this tick Enable Interrupt. Missing Image! Click OK to commit the changes.

7. Manually wire up connection

To connect up the interrupt, left click (keeping the mouse button held down afterwards) on the ip2intc_irpt output of the AXI GPIO and drag the new connection across to the IRQ_F2P input of the ZYNQ7 Processing System, release the mouse button once the connection is established. Missing Image!

8. Rename external ports

Rename the external port that GPIO2 is connected to so it has a more meaningful name. Highlight switches and goto the Vivado cockpit window, in the External Interface Properties under BLOCK DESIGN change the Name field from switches to buttons. Missing Image! The block design should now reflect the changes. Missing Image!

9. Validate block design

Verify the block design is error free by clicking on the Validate Design Missing Image! icon. Once validated save the block design and return the floating Diagram pane back to Vivado by clicking on the Dock Missing Image! icon.

10. Modify pin constraints

Using the zedboard_master_XDC_RevC_D_v3.xdc from /home/steve/projects/common/fw as a reference the constraints from the previous project can be adjusted to suit this project.

Double click on the existing constraints zedboard.xdc within Sources » Constraints » constrs_1 to edit. Missing Image! Adjust zedboard.xdc and save the file.


  1. # LED's - Bank 33
  2. set_property PACKAGE_PIN T22 [get_ports {leds_tri_o[0]}];  # "LD0"
  3. set_property PACKAGE_PIN T21 [get_ports {leds_tri_o[1]}];  # "LD1"
  4. set_property PACKAGE_PIN U22 [get_ports {leds_tri_o[2]}];  # "LD2"
  5. set_property PACKAGE_PIN U21 [get_ports {leds_tri_o[3]}];  # "LD3"
  6. set_property PACKAGE_PIN V22 [get_ports {leds_tri_o[4]}];  # "LD4"
  7. set_property PACKAGE_PIN W22 [get_ports {leds_tri_o[5]}];  # "LD5"
  8. set_property PACKAGE_PIN U19 [get_ports {leds_tri_o[6]}];  # "LD6"
  9. set_property PACKAGE_PIN U14 [get_ports {leds_tri_o[7]}];  # "LD7"

  10. # Buttons - Bank 34
  11. set_property PACKAGE_PIN P16 [get_ports {buttons_tri_i[0]}];  # "BTNC"
  12. set_property PACKAGE_PIN R16 [get_ports {buttons_tri_i[1]}];  # "BTND"
  13. set_property PACKAGE_PIN N15 [get_ports {buttons_tri_i[2]}];  # "BTNL"
  14. set_property PACKAGE_PIN R18 [get_ports {buttons_tri_i[3]}];  # "BTNR"
  15. set_property PACKAGE_PIN T18 [get_ports {buttons_tri_i[4]}];  # "BTNU"

  16. # Banks
  17. set_property IOSTANDARD LVCMOS33 [get_ports -of_objects [get_iobanks 33]];
  18. set_property IOSTANDARD LVCMOS18 [get_ports -of_objects [get_iobanks 34]];
  19. set_property IOSTANDARD LVCMOS18 [get_ports -of_objects [get_iobanks 35]];

11. Generate bitstream

Generate the programmable logic bitstream by clicking on Generate Bitstream under the PROGRAM AND DEBUG heading inside the Flow Navigator section.

12. Export Hardware Platform

Export the hardware platform by selecting File » Export » Export Hardware... from the main menu. Include the bitstream in the exported hardware file and save as /home/steve/projects/leds_buttons/fw/system_wrapper.xsa.

13. Archive project

Create a project regeneration script by selecting File » Project » Write Tcl... from the main menu. Tick the Copy sources to new project & Recreate Block Designs using Tcl options and set the Output file to /home/steve/projects/leds_buttons/fw/project.tcl.

Review the script paying particular attention to any files listed below the following section of the header. There are no additional files listed for this project.
  1. # NOTE: In order to use this script for source control purposes, please make sure that the
  2. #       following files are added to the source control system:-
Prevent the script from creating a project directory by removed this option from the create_project command.
steve@Linux-Steve:/home/steve/projects/leds_buttons/fw$ sed -i 's/create_project ${_xil_proj_name_} .\/${_xil_proj_name_}/create_project ${_xil_proj_name_}/g' project.tcl

14. Commit to repository

The project.tcl & zedboard.xdc are the only files that require updating in the repository.
steve@Linux-Steve:/home/steve/projects/leds_buttons/fw$ cd ..
steve@Linux-Steve:/home/steve/projects/leds_buttons$ svn commit -m "Changed GPIO2 connection from slide switches (sws_8bit) to navigation buttons (btns_5bit)."