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Tutorial
Missing Image!
Part 2 - Create & build Firmware & Software projects using BSP then deploy on Zedboard

Introduction

This tutorial details the steps required to create Firmware with Vivado & Software with Vitis for a Hello World application that will ultimately be deployed on the Zedboard hardware. The tutorial covers generation of Programmable Logic (PL) & Processor System (PS) for the Zynq-7000 SoC with the aid of a BSP. Deployment of the PL & PS images will be via JTAG and the resulting output provided via a UART upto the host PC.

Aims

The aims of this tutorial are as follows :-

    Part 1 - Project Setup

    1. Setup environment
    2. Create project area

    Part 2 - Firmware Development

    1. Launch Vivado
    2. Create project
    3. Create block design
    4. Add IP to block design
    5. Re-customize IP
    6. Validate block design
    7. Generate output products
    8. Create HDL wrapper
    9. Generate bitsteam
    10. Export hardware platform

    Part 3 - Software Development

    1. Launch Vitis
    2. Create project
    3. Build platform
    4. Create new source file
    5. Build project

    Part 4 - Hardware Deployment

    1. Setup Zedboard hardware
    2. Launch MiniCom terminal emulator
    3. Deploy firmware & software on Zedboard
    4. Check everything is working as expected

    Part 5 - Revision Control

    1. Create repository & commit files

    Part 6 - Quickstart

    1. Obtain tutorial files from Bitbucket, create & build projects, deploy on Zedboard

    1. Setup environment

    Setup Xilinx design environment for the 2021.2 toolset.
    steve@Desktop:~$ xilinx
    Xilinx tools available tools at /opt/Xilinx :-
    1) 2021.2 - Vivado - SDK - Vitis - PetaLinux
    0) Exit
    Please select tools required or exit : 1

    Tools are as follows :-
    vivado @ /opt/Xilinx/Vivado/2021.2/bin/vivado
    vitis @ /opt/Xilinx/Vitis/2021.2/bin/vitis
    petalinux-build @ /opt/Xilinx/PetaLinux/2021.2/tool/tools/common/petalinux/bin/petalinux-build

    2. Create project area

    Create the project directory structure and change the present working directory (pwd) to be at its root.
    steve@Desktop:~$ create_project_structure.sh ~/projects/zedboard_hello_world
    Creating project directory structure @ ~/projects/zedboard_hello_world
    steve@Desktop:~$ cd ~/projects/zedboard_hello_world

    3. Launch Vivado

    Launch Vivado quietly from a Terminal.
    steve@Desktop:~/projects/zedboard_hello_world$ vivado -nojournal -nolog -notrace &

    4. Create project

    The Vivado start window will now appear. Create a project by clicking on Create Project within the Vivado 2021.2 window. Missing Image! Review the information the in the New Project : Create a New Vivado Project window and then click Next. Missing Image! In the New Project : Project Name window set Project Name to project, Project location to ~/projects/zedboard_hello_world/fw/vivado & untick Create project subdirectory. Click Next to proceed. Missing Image! No additional source files are required for this project so in the New Project : Project Type window tick the Do not specify sources at this time check box and then click Next. Missing Image! Click on the Boards tab to view the available boards. Missing Image! The Zedboard Zynq Evaluation and Development Kit isn't installed by default in this version of Vivado. To install it click on Refresh to download the latest version of the catalog, scroll down the list of available boards to find Zedboard Zynq Evaluation and Development Kit and then click on Install. Missing Image! Select the ZedBoard hardware in the New Project : Default Part and then click Next. Missing Image! Look over the project details in the New Project : New Project Summary window and then click Finish. Missing Image! The Vivado project window now appears.

    5. Create block design

    Create a block design by clicking on Create Block Design under the IP INTEGRATOR heading inside the Flow Navigator section. Missing Image! Tip: The buttons in the top menu bar of a pane provide a very useful way of expanding the working area of that pane. Maximize Missing Image! expands a pane within the project window. Float Missing Image! expands the pane beyond the project window. Restore Missing Image! reverses Maximise. Dock Missing Image! reverses Float.

    The Create Block Design dialog now appears. Change the Design name to system, set the Directory to ~/projects/zedboard_hello_world/fw/src/diagram and then click OK. Missing Image! The Vivado project window now changes to reflect the addition of the Diagram pane. Expand the Diagram pane outside of the Vivado window by clicking on its Float icon Missing Image!. Missing Image!

    6. Add IP to block design

    Add IP to the block design by clicking on the Missing Image! button. Missing Image! Scroll down to the ZYNQ7 Processing System in the pop-up dialog and add this to the block design by double clicking on it. Missing Image! The ZYNQ7 Processing System IP is now added to the block design. Let Vivado automate some of the connections by clicking on Run Block Automation. Missing Image! Review the connections proposed in the Run Block Automation dialog and then click OK. Missing Image! Some of the connections are now made in the block design.

    7. Re-customize IP

    Begin re-customization of the ZYNQ7 Processing System by double clicking on it. Missing Image! The Re-customize IP window now appears. Missing Image! Remove the M_AXI_GP0_ACLK connection from the ZYNQ7 Processing System as it is not required for this design and will cause an error if left unconnected. Click on PS-PL Configuration, expand AXI Non Secure Enablement, expand GP Master AXI interface and untick M AXI GP0 interface. Missing Image! Remove the USB 0 connection from the ZYNQ7 Processing System as it is not required for this design. Click on MIO Configuration, expand I/O Peripherals and untick USB 0. Missing Image! Remove the Timer connection from the ZYNQ7 Processing System as it is not required for this design. Click on MIO Configuration, expand Application Processor Unit and untick Timer 0. Missing Image! Remove the FCLK_CLK0 connection from the ZYNQ7 Processing System as it is not required for this design. Click on Clock Configuration, expand PL Fabric Clocks and untick FCLK_CLK0. Missing Image! Remove the FCLK_RESET0_N connection from the ZYNQ7 Processing System as it is not required for this design. Click on PS-PL Configuration, expand General, expand Enable Clock Resets and untick FCLK_RESET0_N. Missing Image! Commit the changes made to the ZYNQ7 Processing System by clicking on OK.

    8. Validate block design

    Verify the block design is error free by clicking on the Validate Design icon Missing Image! in the Diagram pane or by pressing F6. Missing Image! The above should result in the following dialog being presented, click OK to dismiss this. If errors are found in the block design review these and replay the relevant steps from above. Missing Image! Return the floating Diagram pane back to the Vivado project window by clicking on its Dock icon Missing Image!.

    Save the block design by selecting Save Block Design from the File menu or by pressing Ctrl+S.

    9. Generate output products

    Generate the HDL files that are required for implementation, simulation and synthesis by right clicking on system.bd and selecting Generate Output Products... from the menu. system.bd can be found under the expanded Design Sources inside the Sources tab of the BLOCK DESIGN section. Missing Image! The Generate Output Products dialog now appears. Select the required options (defaults as shown are fine) and then click Generate. Missing Image! The Generate Output Products launch dialog now appears, click OK and wait for the product generation task to complete. Missing Image!

    10. Create HDL wrapper

    Create a top-level wrapper for the block design since block designs cannot be the top-level of a design. Right click on system.bd and select Create HDL Wrapper... from the menu. Missing Image! The Create HDL Wrapper dialog now appears. Select Let Vivado manage wrapper and auto-update and then click OK. Missing Image! Float the Sources pane and fully expand the Design Sources to see the full design hierarchy which now includes the HDL wrapper. Dock the Sources pane after viewing. Missing Image!

    11. Generate bitsteam

    Generate the programmable logic bitstream by clicking on Generate Bitstream under the PROGRAM AND DEBUG heading inside the Flow Navigator section. Missing Image! The No Implementation Results Available dialog will appear on the very first run of any new project. Proceed by clicking Yes. Since synthesis and implementation have not yet been run these will be scheduled to run before the bitstream generation. Missing Image! The Launch Runs dialog now appears. Select the required options (defaults as shown are fine) and then click OK. Missing Image! Once the bitstream generation is complete the Bitstream Generation Completed dialog will appear. Click Cancel to dismiss this. Missing Image! The generated bitstream can now be found in the impl_1 directory.
    steve@Desktop:~/projects/zedboard_hello_world$ ls -la fw/vivado/project.runs/impl_1/*.bit
    -rw-rw-r-- 1 steve steve 4045674 Feb  4 17:06 fw/vivado/project.runs/impl_1/system_wrapper.bit

    12. Export hardware platform

    Export the hardware platform by selecting File » Export » Export Hardware... from Vivado's top menu.

    The Export Hardware Platform dialog now appears. Review the information provided and click Next. Missing Image! The Export Hardware Platform : Output dialog now appears. Include the generated bitstream in the exported hardware by selecting include bitstream and then clicking Next. Missing Image! The Export Hardware Platform : Files dialog now appears. Export the hardware platform to the Firmware directory by changing the Export to location to ~/projects/zedboard_hello_world/fw and then clicking Next. Missing Image! The Export Hardware Platform : Exporting Hardware Platform dialog now appears. Review the information provided and then click Finish. Missing Image! The exported hardware platform is a single zip file with a .xsa extension instead of a .zip. The contents of this file can be viewed by using the zip utility.
    steve@Desktop:~/projects/zedboard_hello_world$ unzip -l fw/system_wrapper.xsa
    Archive:  fw/system_wrapper.xsa
    E4Zp2ya2u9Jpa3dBoQdPZK74T6U15UDBvqEEoPzhKQtak=
      Length      Date    Time    Name
    ---------  ---------- -----   ----
         1203  2021-11-07 07:00   sysdef.xml
      4045674  2021-11-07 07:00   system_wrapper.bit
       517945  2021-11-07 07:00   ps7_init.c
         3676  2021-11-07 07:00   ps7_init.h
        34138  2021-11-07 07:00   ps7_init.tcl
         4280  2021-11-07 07:00   ps7_init_gpl.h
         2333  2021-11-07 07:00   xsa.json
        69596  2021-11-07 07:00   zed_board.jpg
         1184  2021-11-07 07:00   xsa.xml
        75883  2021-11-07 07:00   system.hwh
         2193  2021-11-07 07:00   system.bda
      2763767  2021-11-07 07:00   ps7_init.html
       518549  2021-11-07 07:00   ps7_init_gpl.c
    ---------                     -------
      8040421                     13 files

    13. Launch Vitis

    Launch Vitis from a Terminal.
    steve@Desktop:~/projects/zedboard_hello_world$ vitis &
    In the Vitis IDE Launcher dialog set the Workspace to ~/projects/zedboard_hello_world/sw/vitis and click Launch. Missing Image!

    14. Create project

    The Vitis IDE : Welcome window will now appear. Create a project by clicking on Create Application Project under the Project heading. Missing Image! The New Application : Project Create a New Project window will now appear. Review the information provided and then click Next. Missing Image! The New Application Project : Platform window will now appear. Select the exported hardware platform from Vivado by entering the Create a new platform form hardware (XSA) tab and setting the XSA File to ~/projects/zedboard_hello_world/fw/system_wrapper.xsa. Click Next to continue. Missing Image! The New Application Project : Application Project Details window will now appear. Set the Application project name to zedboard_hello_world and then click Next. Missing Image! The New Application Project : Domain window will now appear. The default settings as shown are fine for this project. Click Next to contune. Missing Image! The New Application Project : Templates window will now appear. Create an empty application by selecting Empty Application(C) from the Available Templates section. Click Finish to continue. Missing Image! The Vitis IDE cockpit window will now appear. This is the window where all the action happens. Missing Image!

    15. Build platform

    Build the platform by right clicking on system_wrapper inside the Explorer tab and selecting Build Project. Missing Image!

    16. Create new source file

    Create a new source file inside the zedboard_hello_world application project. Right click on src then select New » File. Missing Image! In the Create New File dialog click Advanced, tick Link to a file in the file system, use Browse... to select ~/projects/zedboard_hello_world/sw/src/c/zedboard_hello_world.c and then click Finish. Missing Image! The new source file is automatically opened in the Vitis IDE for editing. Missing Image! Copy the code below into the newly created zedboard_hello_world.c and save it by selecting File » Save from the main menu.

    zedboard_hello_world.c

    1. //
    2. // File .......... zedboard_hello_world.c
    3. // Author ........ Steve Haywood
    4. // Version ....... 1.0
    5. // Date .......... 27 December 2021
    6. // Description ...
    7. //   The classic hello world C application.
    8. //


    9. #include <stdio.h>
    10. #include "xil_printf.h"


    11. int main()
    12. {
    13.   print("Hello World\n\r");
    14.   return 0;
    15. }

    17. Build project

    Build the project by right clicking on zedboard_hello_world under zedboard_hello_world_system inside the Explorer tab and selecting Build Project. Missing Image!

    18. Setup Zedboard hardware

    Connect up the hardware as follows :-
    1. Xubuntu PC USB ⇄ Zedboard USB JTAG/Debug
    2. Xubuntu PC USB ⇄ Zedboard USB UART
    Missing Image! Set the boot mode jumpers on the Zedboard for JTAG. Missing Image! Power on the Zedboard.

    19. Launch MiniCom terminal emulator

    If not already running, open up a new terminal and launch the MiniCom terminal emulator.
    steve@Desktop:~$ minized

    Welcome to minicom 2.7.1

    OPTIONS: I18n
    Compiled on Dec 23 2019, 02:06:26.
    Port /dev/ttyACM0, 06:34:25

    Press CTRL-A Z for help on special keys

    20. Deploy firmware & software on Zedboard

    To program the PL & PS part of the Zynq-7000 FPGA right click on zedboard_hello_world under zedboard_hello_world_system inside the Explorer tab and select Run As » Launch on Hardware (Single Application Debug) from the menu. Missing Image!

    21. Check everything is working as expected

    section_launch_minicom()

    22. Create repository & commit files

    Create a fresh repository and commit only the minimum set of files required to recreate the Firmware & Software projects. Create an annotated tag and push the commit & tag up to the remote repository.
    steve@Desktop:~/projects/zedboard_hello_world$ ssh -t git@192.168.2.20 'git init --bare zedboard_hello_world.git'
    steve@Desktop:~/projects/zedboard_hello_world$ git init
    steve@Desktop:~/projects/zedboard_hello_world$ git add fw/src/diagram/system/system.bd
    steve@Desktop:~/projects/zedboard_hello_world$ git add fw/system_wrapper.xsa
    steve@Desktop:~/projects/zedboard_hello_world$ git add sw/src/c/zedboard_hello_world.c
    steve@Desktop:~/projects/zedboard_hello_world$ git commit -m "Basic Zedboard design consisting of just the ZYNQ7 Processing System."
    steve@Desktop:~/projects/zedboard_hello_world$ git tag -a v1.0 -m "Just ZYNQ"
    steve@Desktop:~/projects/zedboard_hello_world$ git remote add origin git@192.168.2.20:zedboard_hello_world.git
    steve@Desktop:~/projects/zedboard_hello_world$ git push -u origin master

    23. Obtain tutorial files from Bitbucket, create & build projects, deploy on Zedboard

    The source files relating to this tutorial for both Firmware & Software can be obtained from Bitbucket.

    The instructions below assume that Part 1 - Installation of tools, setup of environment and creation of project area has been completed in full and that the environment has been setup as per 1. Setup environment. The root project area ~/projects should be present and contain the common project. The zedboard_hello_world project should NOT be present. Adjust the commands below to suit if the above differs.

    Obtain firmware & software source, create & build Vivado project, export hardware, then create & build Vitis project.
    steve@Desktop:~$ cd ~/projects
    steve@Desktop:~/projects$ git clone -b v1.0 https://bitbucket.org/spacewire_firmware/zedboard_hello_world
    steve@Desktop:~/projects$ cd zedboard_hello_world
    steve@Desktop:~/projects/zedboard_hello_world$ create_vivado_project.sh build
    steve@Desktop:~/projects/zedboard_hello_world$ create_vitis_project.sh build
    With the projects now created & built perform the following steps :-
    1. Setup Zedboard hardware
    2. Launch MiniCom terminal emulator
    3. Deploy firware & software on Zedboard
    4. Check everything is working as expected