Part 8 - Resurrect, modify & build 3rd firmware project
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Introduction

This tutorial details the steps required for resurrecting & modifying an existing Vivado project to add interrupts to the GPIO module.

Aims

The aims of this tutorial are as follows :-
  1. Setup environment
  2. Copy repository
  3. Resurrect project
  4. Open block design
  5. Re-customize ZYNQ IP
  6. Re-customize AXI GPIO IP
  7. Manually wire up connection
  8. Run connection automation
  9. Validate block design
  10. Generate bitstream
  11. Export Hardware Platform
  12. Understand what changed
  13. Archive project
  14. Commit to repository

1. Setup environment

Setup Xilinx design environment for the 2020.2 toolset.
steve@Linux-Steve:/home/steve$ source xilinx.sh
Xilinx tools available tools at /opt/Xilinx :-
1) 2020.2 - Vivado - SDK - Vitis - PetaLinux
0) Exit
Please select tools required or exit : 1

Tools are as follows :-
vivado @ /opt/Xilinx/Vivado/2020.2/bin/vivado
vitis @ /opt/Xilinx/Vitis/2020.2/bin/vitis
petalinux-build @ /opt/Xilinx/PetaLinux/2020.2/tool/tools/common/petalinux/bin/petalinux-build

2. Copy repository

This project is not strictly a branch of the previous project but by using that as a starting point negates the need to start over. Copy the leds_switches repository and checkout the files it contains.
steve@Linux-Steve:/home/steve$ svnadmin hotcopy /home/steve/repos/leds_switches /home/steve/repos/leds_buttons
steve@Linux-Steve:/home/steve$ cd /home/steve/projects
steve@Linux-Steve:/home/steve/projects$ svn checkout file:///home/steve/repos/leds_buttons

3. Resurrect project

Resurrect the previous project in Vivado by using the regeneration Tcl script.
steve@Linux-Steve:/home/steve/projects$ cd /home/steve/projects/leds_buttons/fw
steve@Linux-Steve:/home/steve/projects/leds_buttons/fw$ vivado -nojournal -nolog -notrace -source project.tcl &

4. Open block design

Once Vivado appears and completes execution of the Tcl script open the block design by clicking on Open Block Design under the IP INTEGRATOR heading inside the Flow Navigator section. Expand the Diagram by clicking on the Float Missing Image! icon in the Diagram pane inside the BLOCK DESIGN section.

5. Re-customize ZYNQ IP

Double click on the ZYNQ7 Processing System module to begin re-customization.

An interrupt input is required for this design to allow triggered communication from the GPIO to the ZYNQ7 Processing System To enable the IRQ_F2P connection select Interrupts, expand Fabric Interrupts, expand PL-PS Interrupt Ports, tick Fabric Interrupts and then tick Fabric Interrupts. Missing Image! Click OK to commit the changes.

6. Re-customize AXI GPIO IP

Double click on the AXI GPIO module to begin re-customization.

Connections to both the LED's and Push Buttons on the ZedBoard are required for this design. Change the existing GPIO2 selection of sws 8bits under the Board tab to btns 5bits. Review the I/O details by selecting the IP Configuration tab. Missing Image! Connection to the interrupt output ip2intc_irpt on the AXI GPIO is required for this design. To enable this tick Enable Interrupt. Missing Image! Click OK to commit the changes.

7. Manually wire up connection

To connect up the interrupt, left click (keeping the mouse button held down afterwards) on the ip2intc_irpt output of the AXI GPIO and drag the new connection across to the IRQ_F2P input of the ZYNQ7 Processing System, release the mouse button once the connection is established. Missing Image!

8. Run connection automation

Although the GPIO2 connection on the AXI GPIO module has changed the block design does not reflect this yet. To make this change right click on the sws_8bits output and select Delete from the context menu. The Diagram will now display the Run Block Automation message, click on this to let Vivado automate the connections. The diagram will now reflect the changes required. Missing Image!

9. Validate block design

Verify the block design is error free by clicking on the Validate Design Missing Image! icon. Once validated save the block design and return the floating Diagram pane back to Vivado by clicking on the Dock Missing Image! icon.

10. Generate bitstream

Generate the programmable logic bitstream by clicking on Generate Bitstream under the PROGRAM AND DEBUG heading inside the Flow Navigator section.

11. Export Hardware Platform

Export the hardware platform by selecting File » Export » Export Hardware... from the main menu. Include the bitstream in the exported hardware file and save as /home/steve/projects/leds_buttons/fw/system_wrapper.xsa.

12. Understand what changed

To reflect the connection change from sws_8bits to btns_5bit both the HDL Wrapper and the Constraints have been updated.

13. Archive project

Create a project regeneration script by selecting File » Project » Write Tcl... from the main menu. Tick the Copy sources to new project & Recreate Block Designs using Tcl options and set the Output file to /home/steve/projects/leds_buttons/fw/project.tcl.

Review the script paying particular attention to any files listed below the following section of the header. There are no additional files listed for this project.
  1. # NOTE: In order to use this script for source control purposes, please make sure that the
  2. #       following files are added to the source control system:-
Prevent the script from creating a project directory by removed this option from the create_project command.
steve@Linux-Steve:/home/steve/projects/leds_buttons/fw$ sed -i 's/create_project ${_xil_proj_name_} .\/${_xil_proj_name_}/create_project ${_xil_proj_name_}/g' project.tcl

14. Commit to repository

The project.tcl is the only file that requires updating in the repository.
steve@Linux-Steve:/home/steve/projects/leds_buttons/fw$ cd ..
steve@Linux-Steve:/home/steve/projects/leds_buttons$ svn commit -m "Changed GPIO2 connection from slide switches (sws_8bit) to navigation buttons (btns_5bit)."

'projects' location : 'repos' location : 'downloads' location :
Copyright © 2021 Steve Haywood
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