Part 5 - Resurrect, modify & build 2nd firmware project
Missing Image!Missing Image!Missing Image!

Introduction

This tutorial details the steps required for resurrecting & modifying an existing Vivado project to include the GPIO module.

Aims

The aims of this tutorial are as follows :-
  1. Setup environment
  2. Copy repository
  3. Resurrect project
  4. Open block design
  5. Add IP to block design
  6. Re-customize ZYNQ IP
  7. Re-customize AXI GPIO IP
  8. Run connection automation
  9. Validate block design
  10. Generate bitstream
  11. Export Hardware Platform
  12. Understand what changed
  13. Archive project
  14. Commit to repository

1. Setup environment

Setup Xilinx design environment for the 2020.2 toolset.
steve@Linux-Steve:/home/steve$ source xilinx.sh
Xilinx tools available tools at /opt/Xilinx :-
1) 2020.2 - Vivado - SDK - Vitis - PetaLinux
0) Exit
Please select tools required or exit : 1

Tools are as follows :-
vivado @ /opt/Xilinx/Vivado/2020.2/bin/vivado
vitis @ /opt/Xilinx/Vitis/2020.2/bin/vitis
petalinux-build @ /opt/Xilinx/PetaLinux/2020.2/tool/tools/common/petalinux/bin/petalinux-build

2. Copy repository

This project is not strictly a branch of the previous project but by using that as a starting point negates the need to start over. Copy the hello_world repository and checkout the files it contains.
steve@Linux-Steve:/home/steve$ svnadmin hotcopy /home/steve/repos/hello_world /home/steve/repos/leds_switches
steve@Linux-Steve:/home/steve$ cd /home/steve/projects
steve@Linux-Steve:/home/steve/projects$ svn checkout file:///home/steve/repos/leds_switches

3. Resurrect project

Resurrect the previous project in Vivado by using the regeneration Tcl script.
steve@Linux-Steve:/home/steve$ cd /home/steve/projects/leds_switches/fw
steve@Linux-Steve:/home/steve/projects/leds_switches/fw$ vivado -nojournal -nolog -notrace -source project.tcl &

4. Open block design

Once Vivado appears and completes execution of the Tcl script open the block design by clicking on Open Block Design under the IP INTEGRATOR heading inside the Flow Navigator section. Expand the Diagram by clicking on the Float Missing Image! icon in the Diagram pane inside the BLOCK DESIGN section.

5. Add IP to block design

In the floating Diagram window click on the Add IP Missing Image! icon and select AXI GPIO from the menu. The diagram now shows two unconnected IP modules. Missing Image!

6. Re-customize ZYNQ IP

Double click on the ZYNQ7 Processing System module to begin re-customization.

A master AXI interface is required for this design to allow communication between the ZYNQ7 Processing System and the GPIO. To re-enable the M_AXI_GP0_ACLK connection select PS-PL Configuration, expand AXI Non Secure Enablement, expand GP Master AXI interface and tick M AXI GP0 interface. Missing Image! A fabric clock is required for this design to provide a clock to the GPIO module. To re-enable the FCLK_CLK0 connection select Clock Configuration, expand PL Fabric Clocks and tick FCLK_CLK0. Missing Image! Click OK to commit the changes.

7. Re-customize AXI GPIO IP

Double click on the AXI GPIO module to begin re-customization.

Connections to both the LED's and slide switches on the ZedBoard are required for this design. To make these connections select the Board tab and set GPIO to leds 8bit and GPIO2 to sws 8bits. Missing Image! Add a default value to the GPIO output to illuminate the middle two LED's of the eight. Select the IP Configuration tab and set the Default Output Value within the GPIO section to 0x00000018. Missing Image! Click OK to commit the changes.

8. Run connection automation

The Diagram now contains all the I/O connections required by the two IP modules but these are totally unconnected. Let Vivado automate the connections by clicking on Run Block Automation. Missing Image! Review each connection by selected GPIO, GPIO2 & S_AXI respectively. Once reviewed tick All Automation to enable all the suggested connections and then click OK to commit the changes. Missing Image! The extra modules of Processor System Reset & AXI Interconnect are now added to the block design to make connecting up the ZYNQ7 Processing System & AXI GPIO possible. Resize the canvas to obtain a better view of the design and click on the Regenerate Layout Missing Image! icon to obtain a better layout. Missing Image!

9. Validate block design

Verify the block design is error free by clicking on the Validate Design Missing Image! icon. Once validated return the floating Diagram pane back to Vivado by clicking on the Dock Missing Image! icon.

10. Generate bitstream

Generate the programmable logic bitstream by clicking on Generate Bitstream under the PROGRAM AND DEBUG heading inside the Flow Navigator section.

11. Export Hardware Platform

Export the hardware platform by selecting File » Export » Export Hardware... from the main menu. Include the bitstream in the exported hardware file and save as /home/steve/projects/leds_switches/fw/system_wrapper.xsa.

12. Understand what changed

To reflect the connections of leds_8bits and sws_8bits both the HDL Wrapper and the Constraints have been updated.

13. Archive project

Create a project regeneration script by selecting File » Project » Write Tcl... from the main menu. Tick the Copy sources to new project & Recreate Block Designs using Tcl options and set the Output file to /home/steve/projects/leds_switches/fw/project.tcl.

Review the script paying particular attention to any files listed below the following section of the header. There are no additional files listed for this project.
  1. # NOTE: In order to use this script for source control purposes, please make sure that the
  2. #       following files are added to the source control system:-
Prevent the script from creating a project directory by removed this option from the create_project command.
steve@Linux-Steve:/home/steve/projects/leds_switches/fw$ sed -i 's/create_project ${_xil_proj_name_} .\/${_xil_proj_name_}/create_project ${_xil_proj_name_}/g' project.tcl

14. Commit to repository

The project.tcl is the only file that requires updating in the repository.
steve@Linux-Steve:/home/steve/projects/leds_switches/fw$ cd ..
steve@Linux-Steve:/home/steve/projects/leds_switches$ svn commit -m "Added GPIO module to basic Zynq design to allow the use of both LED's and slide switches."

'projects' location : 'repos' location : 'downloads' location :
Copyright © 2021 Steve Haywood
Missing Image!
Missing Image!Missing Image!Missing Image!