;---====================== Start Software License ======================--- ;--== ==-- ;--== This license governs the use of this software, and your use of ==-- ;--== this software constitutes acceptance of this license. Agreement ==-- ;--== with all points is required to use this software. ==-- ;--== ==-- ;--== 1. You may use this software freely for personal use. ==-- ;--== ==-- ;--== 2. You may use this software freely to determine feasibility for ==-- ;--== commercial use. ==-- ;--== ==-- ;--== 3. You may use this software for commercial use if the author ==-- ;--== has given you written consent. ==-- ;--== ==-- ;--== 4. You may modify this software provided you do not remove the ==-- ;--== license and copyright notice. ==-- ;--== ==-- ;--== 5. You may distribute this software and derivative works to ==-- ;--== personal friends and work colleagues only. ==-- ;--== ==-- ;--== 6. You agree that this software comes “as-is” and with no ==-- ;--== warranty whatsoever, either expressed or implied, including, ==-- ;--== but not limited to, warranties of merchantability or fitness ==-- ;--== for a particular purpose. ==-- ;--== ==-- ;--== 7. You agree that the author will not be liable for any damages ==-- ;--== relating from the use of this software, including direct, ==-- ;--== indirect, consequential or incidental. This software is used ==-- ;--== entirely at your own risk and should it prove defective, you ==-- ;--== will assume full responsibility for all costs associated with ==-- ;--== servicing, repair or correction. ==-- ;--== ==-- ;--== Your rights under this license are terminated immediately if you ==-- ;--== breach it in any way. ==-- ;--== ==-- ;---======================= End Software License =======================--- ;---====================== Start Copyright Notice ======================--- ;--== ==-- ;--== Filename ..... asm_cond_tests.txt ==-- ;--== Download ..... http://www.spacewire.co.uk ==-- ;--== Author ....... Steve Haywood (steve.haywood@ukonline.co.uk) ==-- ;--== Copyright .... Copyright (c) 2004 Steve Haywood ==-- ;--== Project ...... Raptor-16 ==-- ;--== Version ...... 1.00 ==-- ;--== Conception ... 20 August 2004 ==-- ;--== Modified ..... N/A ==-- ;--== ==-- ;---======================= End Copyright Notice =======================--- ;---========================= Start Description ========================--- ;--== ==-- ;--== This set of instructions check every single branch condition of ==-- ;--== the Raptor-16 microprocessor and fully covers both the branch ==-- ;--== taken and branch not taken cases. ==-- ;--== ==-- ;--== If all the branches work then the D0 register will be loaded ==-- ;--== with the following sequence of words:- ==-- ;--== ==-- ;--== 0, 1, 2, ..., 63, 64, 65. ==-- ;--== ==-- ;--== Any missed words from the sequence or any -1's loaded into D0 ==-- ;--== indicate that a branch has failed. ==-- ;--== ==-- ;--== Source assembles into 310 words and needs to be run for 24us. ==-- ;--== ==-- ;---========================== End Description =========================--- StackSetUp Move #2048,SP ; Start LoadQ #0,D0 ; BraQ alw,BraA ; Branch should be taken (Always) LoadQ #-1,D0 ; Should not be executed BraA LoadQ #1,D0 ; Bsr nev,BadBoy ; Branch should not be taken (Never) LoadQ #2,D0 ; LoadQ #0,D1 ; BraQ zrs,BraB ; Branch should be taken (Zero Set) LoadQ #-1,D0 ; Should not be executed BraB LoadQ #3,D0 ; Bsr zrs,BadBoy ; Branch should not be taken (Zero Clear) LoadQ #4,D0 ; BraQ zrc,BraC ; Branch should be taken (Zero Clear) LoadQ #-1,D0 ; Should not be executed BraC LoadQ #5,D0 ; LoadQ #0,D1 ; Bsr zrc,BadBoy ; Branch should not be taken (Zero Set) LoadQ #6,D0 ; LoadQ #-1,D1 ; BraQ ngs,BraD ; Branch should be taken (Negative Set) LoadQ #-1,D0 ; Should not be executed BraD LoadQ #7,D0 ; Bsr ngs,BadBoy ; Branch should not be taken (Negative Clear) LoadQ #8,D0 ; BraQ ngc,BraE ; Branch should be taken (Negative Clear) LoadQ #-1,D0 ; Should not be executed BraE LoadQ #9,D0 ; LoadQ #-1,D1 ; Bsr ngc,BadBoy ; Branch should not be taken (Negative Set) LoadQ #10,D0 ; MoveQ #65535,D1 ; AddQ #1,D1 ; BraQ uos,BraF ; Branch should be taken (Unsigned Overflow Set) LoadQ #-1,D0 ; Should not be executed BraF LoadQ #11,D0 ; Move #32767,D1 ; AddQ #1,D1 ; Bsr uos,BadBoy ; Branch should not be taken (Unsigned Overflow Clear) LoadQ #12,D0 ; Move #32768,D1 ; -32768 SubQ #1,D1 ; BraQ uoc,BraG ; Branch should be taken (Unsigned Overflow Clear) LoadQ #-1,D0 ; Should not be executed BraG LoadQ #13,D0 ; LoadQ #0,D1 ; SubQ #1,D1 ; Bsr uoc,BadBoy ; Branch should not be taken (Unsigned Overflow Set) LoadQ #14,D0 ; Move #32767,D1 ; AddQ #1,D1 ; BraQ sos,BraH ; Branch should be taken (Signed Overflow Set) LoadQ #-1,D0 ; Should not be executed BraH LoadQ #15,D0 ; LoadQ #-1,D1 ; 65535 AddQ #1,D1 ; Bsr sos,BadBoy ; Branch should not be taken (Signed Overflow Clear) LoadQ #16,D0 ; LoadQ #0,D1 ; SubQ #1,D1 ; BraQ soc,BraI ; Branch should be taken (Signed Overflow Clear) LoadQ #-1,D0 ; Should not be executed BraI LoadQ #17,D0 ; Move #-32768,D1 ; 32768 SubQ #1,D1 ; Bsr soc,BadBoy ; Branch should not be taken (Signed Overflow Set) LoadQ #18,D0 ; LoadQ #5,D1 ; CmpQ #4,D1 ; BraQ ugt,BraJ ; Branch should be taken (Unsigned Src < Dst) LoadQ #-1,D0 ; Should not be executed BraJ LoadQ #19,D0 ; CmpQ #5,D1 ; Bsr ugt,BadBoy ; Branch should not be taken (Unsigned Src = Dst) LoadQ #20,D0 ; CmpQ #6,D1 ; Bsr ugt,BadBoy ; Branch should not be taken (Unsigned Src > Dst) LoadQ #21,D0 ; Move #50000,D1 ; Cmp #49999,D1 ; BraQ ugt,BraK ; Branch should be taken (Unsigned Src < Dst) LoadQ #-1,D0 ; Should not be executed BraK LoadQ #22,D0 ; Cmp #50000,D1 ; Bsr ugt,BadBoy ; Branch should not be taken (Unsigned Src = Dst) LoadQ #23,D0 ; Cmp #50001,D1 ; Bsr ugt,BadBoy ; Branch should not be taken (Unsigned Src > Dst) LoadQ #24,D0 ; LoadQ #5,D1 ; CmpQ #4,D1 ; BraQ uge,BraL ; Branch should be taken (Unsigned Src < Dst) LoadQ #-1,D0 ; Should not be executed BraL LoadQ #25,D0 ; CmpQ #5,D1 ; BraQ uge,BraM ; Branch should be taken (Unsigned Src = Dst) LoadQ #-1,D0 ; Should not be executed BraM LoadQ #26,D0 ; CmpQ #6,D1 ; Bsr uge,BadBoy ; Branch should not be taken (Unsigned Src > Dst) LoadQ #27,D0 ; Move #50000,D1 ; Cmp #49999,D1 ; BraQ uge,BraN ; Branch should be taken (Unsigned Src < Dst) LoadQ #-1,D0 ; Should not be executed BraN LoadQ #28,D0 ; Cmp #50000,D1 ; BraQ uge,BraO ; Branch should be taken (Unsigned Src = Dst) LoadQ #-1,D0 ; Should not be executed BraO LoadQ #29,D0 ; Cmp #50001,D1 ; Bsr uge,BadBoy ; Branch should not be taken (Unsigned Src > Dst) LoadQ #30,D0 ; LoadQ #5,D1 ; CmpQ #4,D1 ; Bsr ult,BadBoy ; Branch should not be taken (Unsigned Src < Dst) LoadQ #31,D0 ; CmpQ #5,D1 ; Bsr ult,BadBoy ; Branch should not be taken (Unsigned Src = Dst) LoadQ #32,D0 ; CmpQ #6,D1 ; BraQ ult,BraP ; Branch should be taken (Unsigned Src > Dst) LoadQ #-1,D0 ; Should not be executed BraP LoadQ #33,D0 ; Move #50000,D1 ; Cmp #49999,D1 ; Bsr ult,BadBoy ; Branch should not be taken (Unsigned Src < Dst) LoadQ #34,D0 ; Cmp #50000,D1 ; Bsr ult,BadBoy ; Branch should not be taken (Unsigned Src = Dst) LoadQ #35,D0 ; Cmp #50001,D1 ; BraQ ult,BraQ ; Branch should be taken (Unsigned Src > Dst) LoadQ #-1,D0 ; Should not be executed BraQ LoadQ #36,D0 ; LoadQ #5,D1 ; CmpQ #4,D1 ; Bsr ule,BadBoy ; Branch should not be taken (Unsigned Src < Dst) LoadQ #37,D0 ; CmpQ #5,D1 ; BraQ ule,BraR ; Branch should be taken (Unsigned Src = Dst) LoadQ #-1,D0 ; Should not be executed BraR LoadQ #38,D0 ; CmpQ #6,D1 ; BraQ ule,BraS ; Branch should be taken (Unsigned Src > Dst) LoadQ #-1,D0 ; Should not be executed BraS LoadQ #39,D0 ; Move #50000,D1 ; Cmp #49999,D1 ; BsrQ ule,BadBoy ; Branch should not be taken (Unsigned Src < Dst) LoadQ #40,D0 ; Cmp #50000,D1 ; BraQ ule,BraT ; Branch should be taken (Unsigned Src = Dst) LoadQ #-1,D0 ; Should not be executed BraT LoadQ #41,D0 ; Cmp #50001,D1 ; BraQ ule,BraU ; Branch should be taken (Unsigned Src > Dst) LoadQ #-1,D0 ; Should not be executed BraU LoadQ #42,D0 ; LoadQ #5,D1 ; CmpQ #4,D1 ; BraQ sgt,BraJJ ; Branch should be taken (Signed Src < Dst) LoadQ #-1,D0 ; Should not be executed BraJJ LoadQ #43,D0 ; CmpQ #5,D1 ; BsrQ sgt,BadBoy ; Branch should not be taken (Signed Src = Dst) LoadQ #44,D0 ; CmpQ #6,D1 ; BsrQ sgt,BadBoy ; Branch should not be taken (Signed Src > Dst) LoadQ #45,D0 ; Move #-20000,D1 ; Cmp #-20001,D1 ; BraQ sgt,BraKK ; Branch should be taken (Signed Src < Dst) LoadQ #-1,D0 ; Should not be executed BraKK LoadQ #46,D0 ; Cmp #-20000,D1 ; BsrQ sgt,BadBoy ; Branch should not be taken (Signed Src = Dst) LoadQ #47,D0 ; Cmp #-19999,D1 ; BsrQ sgt,BadBoy ; Branch should not be taken (Signed Src > Dst) LoadQ #48,D0 ; LoadQ #5,D1 ; CmpQ #4,D1 ; BraQ sge,BraLL ; Branch should be taken (Signed Src < Dst) LoadQ #-1,D0 ; Should not be executed BraLL LoadQ #49,D0 ; CmpQ #5,D1 ; BraQ sge,BraMM ; Branch should be taken (Signed Src = Dst) LoadQ #-1,D0 ; Should not be executed BraMM LoadQ #50,D0 ; CmpQ #6,D1 ; BsrQ sge,BadBoy ; Branch should not be taken (Signed Src > Dst) LoadQ #51,D0 ; Move #-20000,D1 ; Cmp #-20001,D1 ; BraQ sge,BraNN ; Branch should be taken (Signed Src < Dst) LoadQ #-1,D0 ; Should not be executed BraNN LoadQ #52,D0 ; Cmp #-20000,D1 ; BraQ sge,BraOO ; Branch should be taken (Signed Src = Dst) LoadQ #-1,D0 ; Should not be executed BraOO LoadQ #53,D0 ; Cmp #-19999,D1 ; BsrQ sge,BadBoy ; Branch should not be taken (Signed Src > Dst) LoadQ #54,D0 ; LoadQ #5,D1 ; CmpQ #4,D1 ; BsrQ slt,BadBoy ; Branch should not be taken (Signed Src < Dst) LoadQ #55,D0 ; CmpQ #5,D1 ; BsrQ slt,BadBoy ; Branch should not be taken (Signed Src = Dst) LoadQ #56,D0 ; CmpQ #6,D1 ; BraQ slt,BraPP ; Branch should be taken (Signed Src > Dst) LoadQ #-1,D0 ; Should not be executed BraPP LoadQ #57,D0 ; Move #-20000,D1 ; Cmp #-20001,D1 ; BsrQ slt,BadBoy ; Branch should not be taken (Signed Src < Dst) LoadQ #58,D0 ; Cmp #-20000,D1 ; BsrQ slt,BadBoy ; Branch should not be taken (Signed Src = Dst) LoadQ #59,D0 ; Cmp #-19999,D1 ; BraQ slt,BraQQ ; Branch should be taken (Signed Src > Dst) LoadQ #-1,D0 ; Should not be executed BraQQ LoadQ #60,D0 ; LoadQ #5,D1 ; CmpQ #4,D1 ; BsrQ sle,BadBoy ; Branch should not be taken (Signed Src < Dst) LoadQ #61,D0 ; CmpQ #5,D1 ; BraQ sle,BraRR ; Branch should be taken (Signed Src = Dst) LoadQ #-1,D0 ; Should not be executed BraRR LoadQ #62,D0 ; CmpQ #6,D1 ; BraQ sle,BraSS ; Branch should be taken (Signed Src > Dst) LoadQ #-1,D0 ; Should not be executed BraSS LoadQ #63,D0 ; Move #-20000,D1 ; Cmp #-20001,D1 ; BsrQ sle,BadBoy ; Branch should not be taken (Signed Src < Dst) LoadQ #64,D0 ; Cmp #-20000,D1 ; BraQ sle,BraTT ; Branch should be taken (Signed Src = Dst) LoadQ #-1,D0 ; Should not be executed BraTT LoadQ #65,D0 ; Cmp #-19999,D1 ; BraQ sle,Infinate ; Branch should be taken (Signed Src > Dst) LoadQ #-1,D0 ; Should not be executed Infinate BraQ alw,Infinate ; BadBoy LoadQ #-1,D0 ; Flag Branch Error Rts ; Return